TRADESPACE ANALYSIS OF HETEROGENEOUS DATA PROCESSING IN ALL-DIGITAL PHASED ARRAY RADARS TO MAKE REAL-TIME PROCESSING POSSIBLE

Abstract

All-digital phased array radars are an emerging technology that requires data processing techniques which are scalable, leverage open-architecture software components, and avoid bottlenecks for the real-time operation. Addressing these challenges relies on heterogeneous processing and distributed software development on CPUs, GPUs, and FPGAs, whereby the overarching algorithm processing chain is distributed in a way that begins at the ADC of each element on an array and concludes in actionable data products. An important aspect is not only the speed of the algorithms, but also system design considerations and throughput of packetized data transfer. These packets are routed and processed within a network of computing services. This thesis explores the tradespace of heterogeneous data processing for all-digital phased array radar and develops several key algorithms and presents architectural solutions. These include CPU-based Doppler processing using the FFTW guru interface, GPU based-Doppler processing using cuFFT, and an efficient GPU corner-turn. These algorithms are integrated into a scalable framework for use in real-time on Horus. The results quantify the impact of dataset size, PCIe throughput, and heterogeneous resource allocation on real-time performance, and they highlight system-level constraints that will inform future digital radar architectures. This thesis will demonstrate how heterogeneous computing, combined with a thorough understanding of software architecture, hardware architecture, and implementation algorithms, can address the substantial throughput requirements of real-time signal processing for all-digital phased array radar.