Study on a Quantum-dot Automata Based Asynchronous Circuit Design

Abstract

Quantum-Dot Cellular Automata (QCA) is one of the most emerging technologies. It has been introduced as a possible alternative to CMOS (Complementary Metal Oxide Semiconductor). The main objective of this thesis work is to apply CMOS based asynchronous methodology to QCA paradigm. The concept of QCA clocking is quite different from that of CMOS clocking. In the QCA, the clock is used as a control signal in stead of a data signal. Inherited characteristics of QCA, such as the way to hold state, the way to synchronize data flows, and the way to power QCA cells make the design of QCA circuits quite different from VLSI. This also introduces a variety of new challenges to the design and the greatest challenges are due to the fact that the overall timing of a QCA circuit is mainly dependent on its layout. In order to eliminates "Layout=Timing" constraint from QCA circuits, delay-insensitive data encoding scheme such as NCL(Null Convention Logic) are applied to the QCA paradigm. Proposed QCA-based NCL full adder illustrates how NCL prevents timing constraint from QCA circuits.