The scanning tunnelling microscope (STM) is a very powerful analytic tool capable of achieving atomic resolution. Unfortunately, the STM is restricted to samples that are sufficiently conductive to allow adequate tunneling current for feedback control. The amplifier used to measure the tunneling current is the critical limiting component. If the amplifier could be made more sensitive, the STM could be operated at lower tunneling currents allowing lower conductivity samples to be studied. Most amplifiers used in STM employ a resistor feedback design, which become unstable at high gain necessitating a tradeoff between gain and bandwidth. One way to circumvent that stability problem is to use a capacitor feedback design (switched integrator), which does not exhibit the same stability problem. This comes at the expense of added complexity because the output is the integral of the current and needs to be periodically reset. In this project, a switched-integrator current amplifier is constructed and explored. It consisted of an analog switched integrator controlled by a field-programmable-gate-array (FPGA) with a 16-bit analog-to-digital converter and an 18-bit digital-to-analog converter. A viable prototype was created which allowed for the exploration of the gain, phase, and time delay of such systems. This exploration helped further characterize the important design considerations and trade-offs necessary for such a system. A design sequence is proposed that allows for optimal planning based on the desired tunneling current and system bandwidth.