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dc.contributor.authorWong, Brandon
dc.contributor.authorUnderwood, Alex
dc.contributor.authorPatterson, Clay
dc.contributor.authorBothwell, Daniel
dc.date.accessioned2018-11-21T21:25:07Z
dc.date.available2018-11-21T21:25:07Z
dc.date.issued2018-04-24
dc.identifieroksd_wong_HT_2018
dc.identifier.urihttps://hdl.handle.net/11244/302137
dc.description.abstractThe Nintendo Entertainment System (NES) is Nintendo�s 1980-era console that paved the way for the gaming industry over the following decades. The FPGA NES is a senior project that aims to seamlessly recreate the original NES using SystemVerilog while updating the audio and video outputs to a modern interface. The system�s functionality was broken out into 3 major subsystems (the CPU, the APU, and the PPU) and put on a development board. In the end, the system was recreated to meet all initial specifications we set for ourselves while also implementing additional mappers to allow more than 500 games to be played.
dc.formatapplication/pdf
dc.languageen_US
dc.rightsCopyright is held by the author who has granted the Oklahoma State University Library the non-exclusive right to share this material in its institutional repository. Contact Digital Library Services at lib-dls@okstate.edu or 405-744-9161 for the permission policy on the use, reproduction or distribution of this material.
dc.titleFPGA NES
osu.filenameoksd_wong_HT_2018.pdf
osu.accesstypeOpen Access
dc.type.genreHonors Thesis
dc.type.materialText
thesis.degree.disciplineElectrical and Computer Engineering
thesis.degree.grantorOklahoma State University


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