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dc.contributor.advisorHutchens, Chriswell
dc.contributor.authorRamamurthy, Srikanth Vellore Avadhanam
dc.date.accessioned2014-04-17T20:09:08Z
dc.date.available2014-04-17T20:09:08Z
dc.date.issued2007-12-01
dc.identifier.urihttps://hdl.handle.net/11244/10264
dc.description.abstractThe objective of this research is to design an SRAM that works for the temperature range 0�C to 275�C, with an emphasis on reduction in design time by segregating critical modules and characterizing them. This way of characterizing the critical modules has proven to be helpful in duplicating them multiple times to achieve the size of the memory required, and also to meet the performance requirements. A High temperature SRAM system consisting of two 32k-bit SRAMs (an on-chip SRAM and an off-chip SPI SRAM) was designed and fabricated in 0.5um SOS Peregrine process. The methodology of design time reduction was used for SPI SRAM which is a variant of on-chip SRAM. The fabricated SPI SRAM was tested across the operating temperature range and upto 275�C, and the performance parameters were measured. The measured performance parameters were found to be in accordance with/exceed the required performance.
dc.formatapplication/pdf
dc.languageen_US
dc.publisherOklahoma State University
dc.rightsCopyright is held by the author who has granted the Oklahoma State University Library the non-exclusive right to share this material in its institutional repository. Contact Digital Library Services at lib-dls@okstate.edu or 405-744-9161 for the permission policy on the use, reproduction or distribution of this material.
dc.titleDesign of a Flexible High Temperature Sram with Reduced Design Time
dc.typetext
dc.contributor.committeeMemberJohnson, Louis G.
dc.contributor.committeeMemberStine, James
osu.filenameRamamurthy_okstate_0664M_2596.pdf
osu.collegeEngineering, Architecture, and Technology
osu.accesstypeOpen Access
dc.description.departmentSchool of Electrical & Computer Engineering
dc.type.genreThesis


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