Vlsi Design And Comparison Of Bank Memory With Multiport Memory Cell Versus Conventional Multiport And Multibank Sram Memory
Abstract
The main focus of this thesis is to determine whether designing a bank memory with multiport memory cell (hybrid design) is advantageous over conventionally used multibank and multiport memory designs. The layout designs are created using Cadence Virtuoso with the ami06u C5N technology process and simulated using IRSIM. The area of multibank, multiport and hybrid designs are compared to each other for 4kb, 16kb and 64kb memory sizes. I found that hybrid is advantageous over multiport design in case of bigger memories. Also a delay comparison was done for 4kb memory size and found that hybrid is faster in its read ability in comparison to multibank memory.
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