A Verilog Implementation of Weighted Sum Multiobjective Optimization for use in Cognitive Radar
| dc.contributor.advisor | Fitzmorris, Cliff | |
| dc.contributor.author | Wesson, Jered | |
| dc.contributor.committeeMember | Barnes, Ronald | |
| dc.contributor.committeeMember | Metcalf, Justin | |
| dc.date.accessioned | 2021-12-15T15:04:13Z | |
| dc.date.available | 2021-12-15T15:04:13Z | |
| dc.date.issued | 2021-12-17 | |
| dc.date.manuscript | 2021-12-14 | |
| dc.description.abstract | As wireless technologies continue to become more ubiquitous in a variety of different applications, the electromagnetic spectrum will become increasingly saturated. Billions of wireless devices that utilize the spectrum are already in use, and it seems that the production and sale of these devices will not subside in the near future. As the number of these devices increases and the spectrum becomes more crowded, applications that apply the technique of spectrum sharing become even more important. The work in this thesis is specifically focused on cognitive radar applications, but the techniques and concepts used in this hardware implementation could be applied to other devices and applications that employ spectrum sharing. The contribution of this work is a Verilog implementation of a weighted sum multiobjective optimization (WSMO) algorithm for use in spectrum sharing applications. In a cognitive radar, this algorithm is used to choose the optimal transmit band by balancing the competing objectives of low interference and large bandwidth. In typical cognitive radars, this analysis is performed by the host PC. Data transmission to the host PC and computation times on the CPU make this a nonrealistic procedure for algorithms with high computational complexity if real-time operation is desired. Migrating this work to a field programmable gate array (FPGA) located in the radar itself allows the computation of WSMO in real time through parallelization of the algorithm and elimination of the unnecessary transmission of spectrum data to the host PC for processing. | en_US |
| dc.identifier.uri | https://hdl.handle.net/11244/332328 | |
| dc.language | en_US | en_US |
| dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 International | * |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
| dc.subject | Hardware Acceleration | en_US |
| dc.subject | FPGA | en_US |
| dc.subject | Verilog | en_US |
| dc.subject | Multiobjective Optimization | en_US |
| dc.subject | WSMO | en_US |
| dc.subject | Cognitive Radar | en_US |
| dc.subject | Spectrum Sharing | en_US |
| dc.thesis.degree | Master of Science | en_US |
| dc.title | A Verilog Implementation of Weighted Sum Multiobjective Optimization for use in Cognitive Radar | en_US |
| ou.group | Gallogly College of Engineering::School of Electrical and Computer Engineering | en_US |
| shareok.nativefileaccess | restricted | en_US |
| shareok.orcid | 0000-0001-6551-158X | en_US |