dc.contributor.advisor | Stine, James E. | |
dc.contributor.author | Chen, Jun | |
dc.date.accessioned | 2013-12-10T18:05:46Z | |
dc.date.available | 2013-12-10T18:05:46Z | |
dc.date.issued | 2008-12 | |
dc.identifier.uri | https://hdl.handle.net/11244/7850 | |
dc.description.abstract | Adders are the among the most essential arithmetic units within digital systems. Parallel-prefix structures are efficient for adders because of their regular topology and logarithmic delay. However, building parallel-prefix adders are barely discussed in literature. This work puts emphasis on how to build prefix trees and simple algorithms for building these architectures. One particular modification of adders is for use with modulo arithmetic. The most common type of modulo adders are modulo 2n -1 and modulo 2n + 1 adders because they have a common base that is a power of 2. In order to improve their speed, parallel-prefix structures can also be employed for modulo 2n +- 1 adders. This dissertation presents the formation of several binary and modulo prefix architectures and their modifications using Ling's algorithm. For all binary and modulo adders, both algorithmic and quantitative analysis are provided to compare the performance of different architectures. Furthermore, to see how process impact the design, three technologies, from deep submicron to nanometer range, are utilized to collect the quantitative data. | |
dc.format | application/pdf | |
dc.language | en_US | |
dc.rights | Copyright is held by the author who has granted the Oklahoma State University Library the non-exclusive right to share this material in its institutional repository. Contact Digital Library Services at lib-dls@okstate.edu or 405-744-9161 for the permission policy on the use, reproduction or distribution of this material. | |
dc.title | Parallel-prefix structures for binary and modulo {2n - 1, 2n, 2n + 1} adders | |
dc.contributor.committeeMember | Johnson, Louis G. | |
dc.contributor.committeeMember | Sohoni, Sohum Ashok | |
dc.contributor.committeeMember | Burchard, Hermann G. W. | |
osu.filename | Chen_okstate_0664D_10070.pdf | |
osu.accesstype | Open Access | |
dc.type.genre | Dissertation | |
dc.type.material | Text | |
thesis.degree.discipline | Electrical and Computer Engineering | |
thesis.degree.grantor | Oklahoma State University | |