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dc.contributor.advisorChan, Kam Wai Clifford
dc.contributor.authorJiang, Chao
dc.date.accessioned2016-08-11T15:49:22Z
dc.date.available2016-08-11T15:49:22Z
dc.date.issued2016
dc.identifier.urihttps://hdl.handle.net/11244/44866
dc.description.abstractBiomedical data are often collected and stored at different sites. How to take the most advantage of the data to provide better health care for patients and to contribute to academic research becomes more and more important and challenging considering the privacy regulations association with the data. There are several barriers to sharing and exchanging information, such as complex of data formats, information leakage during the data transmission, and big data issues. In this thesis, I focus on how to conduct integrated data analysis while ensuring data privacy and security during both data transmission and integration. Through a small experiment of GLORE[1] implemented on both garbled circuits[2] and Intel® Software Guard Extensions (Intel® SGX), I found that Intel® SGX performed better than garbled circuits in time consuming. So I believe that Intel® SGX has the potential to make great progress in security multiparty computation. By applying Intel® SGX, I not only built a framework but also devised a more flexible model that lets participants more freely cooperate with each other. My model AGILE leverages Intel® SGX to deliver trustworthy computations, a feature that is unlike the existing models like GLORE and VERTIGO[3] that address the integration problem when data is either horizontally or vertically partitioned. AGILE deals with data that is arbitrarily partitioned. Furthermore, to demonstrate AGILE’s performance, I evaluated the model using two real datasets. The experimental results show that AGILE provides secure and accurate computation much faster than GLORE and VERTIGO.en_US
dc.languageen_USen_US
dc.subjectEngineering, Electronics and Electrical.en_US
dc.titleAGILE: ARBITRARY GRID LOGISTIC REGRESSION USING INTEL SOFTWARE GUARD EXTENSIONSen_US
dc.contributor.committeeMemberSamuel, Cheng
dc.contributor.committeeMemberVerma, Pramode
dc.date.manuscript2016-08-10
dc.thesis.degreeMaster of Scienceen_US
ou.groupCollege of Engineering::School of Electrical and Computer Engineeringen_US
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