Implementation of Hierarchical Predecoder/Decoder Structure in Openram Opensource Memory Compiler

Abstract

This thesis deals with the implementation of the decoder structure within the OPENRAM, open-source memory compiler. Memory compilers are software scripts that are used to generate memory macros according to a user's specification. Standard-Random Access Memory (SRAM) consists of an architecture that is made up of memory arrays and peripheral circuits. The peripheral circuit includes row decoder, column selection, pre-charge, write drivers and sense amplifier circuits. In this thesis, Python software is utilized to hierarchically create a decoder that is constructed efficiently given a set of arguments. In order to accomplish this task, a hierarchical decoder utilizes two levels of decoding to build its structure efficiently. This module accepts parameters for a given SRAM size, detects the pre-decoder stages required for the given address size and generates the hierarchical decoder structure accordingly. Area and Delay results are demonstrated within the FREEPDK technology for several different sizes.