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Now showing items 31-32 of 32
Error-correction coding for high-density magnetic recording channels.
(2004)
Finally, a promising algorithm which combines RS decoding algorithm with LDPC decoding algorithm together is investigated, and a reduced-complexity modification has been proposed, which not only improves the decoding ...
Multiplierless CSD techniques for high performance FPGA implementation of digital filters.
(2007)
I leverage FastCSD to develop a new, high performance iterative multiplierless structure based on a novel real-time CSD recoding, so that more zero partial products are introduced. Up to 66.7% zero partial products occur ...