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Now showing items 101-103 of 103
Multiplierless CSD techniques for high performance FPGA implementation of digital filters.
(2007)
I leverage FastCSD to develop a new, high performance iterative multiplierless structure based on a novel real-time CSD recoding, so that more zero partial products are introduced. Up to 66.7% zero partial products occur ...
The Development of a Smart and Low Power Consumption Variable Speed Limit Sign for the Oklahoma Department of Transportation
(2024-05-10)
Variable Speed Limit Signs (VSLSs) play a crucial role in traffic management. Various studies have demonstrated that they can significantly reduce accidents and improve traffic flow, particularly on congested highways, ...
Information Theoretic Modeling of Antennas
(2024-05-10)
Linear time-invariant (LTI) electrically small antennas (ESAs) have inherent limitations in their capabilities. Two significant limitations apply to LTI antennas: a lower bound on the antenna Q-factor, which causes a narrow ...