GPGPU Programming and the Pitfalls of Nave Data Handling
Abstract
The purpose of this study was to implement a known bottleneck of a model based video encoder in code that runs on a modern graphics card using various methods. The study then looks the degree of speedup as well as the new bottlenecks for each implementation. The study also compares and contrasts the effectiveness of each method at improving the performance of the encoder. While moving the highly parallel error calculation to the graphics card reduced the time required to perform the computation, the program still ran slower. Through analysis of the processors performance counters, the image data appears to move through system memory even though its origin and destination are in graphics memory. This inefficient handling of the data that should remain in graphics memory is removing any potential speedup from using the graphics card as a highly parallel coprocessor to accelerate the slowest part of the original program.
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- OSU Theses [15752]